202 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			202 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
/*
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  Copyright (c) 2011 Arduino.  All right reserved.
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  This library is free software; you can redistribute it and/or
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  modify it under the terms of the GNU Lesser General Public
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  License as published by the Free Software Foundation; either
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  version 2.1 of the License, or (at your option) any later version.
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  This library is distributed in the hope that it will be useful,
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  but WITHOUT ANY WARRANTY; without even the implied warranty of
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  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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  See the GNU Lesser General Public License for more details.
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  You should have received a copy of the GNU Lesser General Public
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  License along with this library; if not, write to the Free Software
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  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
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*/
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#include "pins_arduino.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Pin number
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const PinName digitalPin[] = {
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  PA_0,  //D0
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  PA_1,  //D1
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  PA_2,  //D2
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  PA_3,  //D3
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  PA_4,  //D4
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  PA_5,  //D5
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  PA_6,  //D6
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  PA_7,  //D7
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  PA_8,  //D8
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  PA_9,  //D9
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  PA_10, //D10
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  PA_11, //D11
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  PA_12, //D12
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  PA_13, //D13
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  PA_14, //D14
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  PA_15, //D15
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  PB_0,  //D16
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  PB_1,  //D17
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  PB_2,  //D18
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  PB_3,  //D19
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  PB_4,  //D20
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  PB_5,  //D21
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  PB_6,  //D22
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  PB_7,  //D23
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  PB_8,  //D24
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  PB_9,  //D25
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  PB_10, //D26
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  PB_11, //D27
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  PB_12, //D28
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  PB_13, //D29
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  PB_14, //D30
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  PB_15, //D31
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  PC_0,  //D32
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  PC_1,  //D33
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  PC_2,  //D34
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  PC_3,  //D35
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  PC_4,  //D36
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  PC_5,  //D37
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  PC_6,  //D38
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  PC_7,  //D39
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  PC_8,  //D40
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  PC_9,  //D41
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  PC_10, //D42
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  PC_11, //D43
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  PC_12, //D44
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  PC_13, //D45
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  PC_14, //D46
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  PC_15, //D47
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  PD_0,  //D48
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  PD_1,  //D49
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  PD_2,  //D50
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  PD_3,  //D51
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  PD_4,  //D52
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  PD_5,  //D53
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  PD_6,  //D54
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  PD_7,  //D55
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  PD_8,  //D56
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  PD_9,  //D57
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  PD_10, //D58
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  PD_11, //D59
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  PD_12, //D60
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  PD_13, //D61
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  PD_14, //D62
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  PD_15, //D63
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  PE_0,  //D64
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  PE_1,  //D65
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  PE_2,  //D66
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  PE_3,  //D67
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  PE_4,  //D68
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  PE_5,  //D69
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  PE_6,  //D70
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  PE_7,  //D71
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  PE_8,  //D72
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  PE_9,  //D73
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  PE_10, //D74
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  PE_11, //D75
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  PE_12, //D76
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  PE_13, //D77
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  PE_14, //D78
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  PE_15, //D79
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  //Duplicated ADC Pins
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  PA_3,  //D80/A0
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  PA_4,  //D81/A1
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  PC_0,  //D82/A2
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  PC_1,  //D83/A3
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  PC_2,  //D84/A4
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  PC_3,  //D85/A5
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  PC_4   //D86/A6
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};
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#ifdef __cplusplus
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}
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#endif
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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  * @brief  System Clock Configuration
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  *         The system Clock is configured as follow :
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  *            System Clock source            = PLL (HSE)
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  *            SYSCLK(Hz)                     = 180000000
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  *            HCLK(Hz)                       = 180000000
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  *            AHB Prescaler                  = 1
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  *            APB1 Prescaler                 = 4
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  *            APB2 Prescaler                 = 2
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  *            HSE Frequency(Hz)              = 12000000
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  *            PLL_M                          = 6
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  *            PLL_N                          = 180
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  *            PLL_P                          = 2
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  *            PLL_Q                          = 7
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  *            VDD(V)                         = 3.3
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  *            Main regulator output voltage  = Scale1 mode
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  *            Flash Latency(WS)              = 5
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  * @param  None
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  * @retval None
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  */
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WEAK void SystemClock_Config(void)
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{
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  RCC_ClkInitTypeDef RCC_ClkInitStruct;
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  RCC_OscInitTypeDef RCC_OscInitStruct;
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  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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  /* Enable Power Control clock */
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  __HAL_RCC_PWR_CLK_ENABLE();
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#ifdef HAL_PWR_MODULE_ENABLED
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  /* The voltage scaling allows optimizing the power consumption when the device is
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     clocked below the maximum system frequency, to update the voltage scaling value
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     regarding system frequency refer to product datasheet.  */
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  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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#endif
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  /* Enable HSE Oscillator and activate PLL with HSE as source */
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  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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  RCC_OscInitStruct.PLL.PLLM = 6;
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  RCC_OscInitStruct.PLL.PLLN = 180;
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  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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  RCC_OscInitStruct.PLL.PLLQ = 7;
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  RCC_OscInitStruct.PLL.PLLR = 2;
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  HAL_RCC_OscConfig(&RCC_OscInitStruct);
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  HAL_PWREx_EnableOverDrive();
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  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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     clocks dividers */
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  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
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                                 RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLRCLK;
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  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
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  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
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  PeriphClkInitStruct.PLLSAI.PLLSAIM = 6;
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  PeriphClkInitStruct.PLLSAI.PLLSAIN = 96;
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  PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
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  PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
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  PeriphClkInitStruct.PLLSAIDivQ = 1;
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  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
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  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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}
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#ifdef __cplusplus
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}
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#endif
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